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Tables of Contents for From Asics to Socs
Chapter/Section Title
Page #
Page Count
List of Abbreviations
xiii
 
Preface
xvii
 
Acknowledgments
xxi
 
Introduction
1
20
Introduction
1
1
Voice Over IP SOC
2
5
Intellectual Property
7
5
SOC Design Challenges
12
4
Design Methodology
16
2
Summary
18
2
References
20
1
Overview of ASICs
21
22
Introduction
21
4
Methodology and Design Flow
25
7
FPGA to ASIC Conversion
32
2
Verification
34
6
Summary
40
1
References
41
2
SOC Design and Verification
43
38
Introduction
43
1
Design for Integration
44
3
SOC Verification
47
9
Set-Top-Box SOC
56
1
Set-Top-Box SOC Example
57
22
Summary
79
1
References
79
2
Physical Design
81
30
Introduction
81
1
Overview of Physical Design Flow
82
5
Some Tips and Guidelines for Physical Design
87
6
Modern Physical Design Techniques
93
15
Summary
108
1
References
109
2
Low-Power Design
111
40
Introduction
111
1
Power Dissipation
112
5
Low-Power Design Techniques and Methodologies
117
23
Low-Power Design Tools
140
5
Tips and Guidelines for Low-Power Design
145
1
Summary
146
1
References
147
4
A Low-Power Design Tools
151
8
PowerTheater
151
2
PowerTheater Analyst
153
2
PowerTheater Designer
155
4
B Open Core Protocol (OCP)
159
6
Highlights
160
1
Capabilities
160
1
Advantages
161
1
Key Features
162
3
C Phase-Locked Loops (PLLs)
165
8
PLL Basics
165
1
PLL Ideal Behavior
166
2
PLL Errors
168
5
Glossary
173
10
Index
183