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Fault Tolerant Architectures for Cryptography and Hardware Security
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Bibliographic Detail
Publisher Springer Verlag
Publication date December 7, 2017
Binding Hardcover
Book category Adult Non-Fiction
ISBN-13 9789811013867
ISBN-10 9811013861
Dimensions 0 by 6.10 by 9.25 in.
Original list price $149.00
Other format details sci/tech
Summaries and Reviews
Amazon.com description: Product Description: This book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography. It offers insights into how the fault tolerance theories developed in the book can actually be implemented, with a particular focus on a wide spectrum of fault models and practical fault injection techniques, ranging from simple, low-cost techniques to high-end equipment-based methods.  It then individually examines fault attack vulnerabilities in symmetric, asymmetric and authenticated encryption systems. This is followed by extensive coverage of countermeasure techniques and fault tolerant architectures that attempt to thwart such vulnerabilities. Lastly, it presents a case study of a comprehensive FPGA-based fault tolerant architecture for AES-128, which brings together of a number of the fault tolerance techniques presented. It concludes with a discussion on how fault tolerance can be combined with side channel security to achieve protection against implementation-based attacks. The text is supported by illustrative diagrams, algorithms, tables and diagrams presenting real-world experimental results.



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Hardcover
Book cover for 9789811013867
 
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With Sikhar Patranabis | from Springer Verlag (December 7, 2017)
9789811013867 | details & prices | List price $149.00
About: This book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography.

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