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Tables of Contents for The 8051 Microcontroller
Chapter/Section Title
Page #
Page Count
PREFACE
ix
 
CHAPTER 1 Architecture of a Microcomputer
1
18
1.1 Introduction
1
2
1.2 The CPU
3
4
1.3 Memory
7
6
1.4 Input/Output (I/O)
13
2
1.5 Speed
15
2
1.6 Summary
17
2
CHAPTER 2 The 8051 Single-Chip Microcontroller
19
46
2.1 Introduction
19
1
2.2 8051 Hardware Overview
20
1
2.3 CPU Timing
20
2
2.4 Memory Organization
22
3
2.5 SFR Space: Special Function Registers
25
3
2.6 I/O Ports
28
2
2.7 Timer/Counters
30
2
2.8 Serial Port Interface
32
3
2.9 Interrupts
35
5
2.10 Instructions and Addressing
40
4
2.11 Instruction Groups
44
2
2.12 Single-Bit Boolean Processor
46
2
2.13 Example Programs
48
3
2.14 System Examples: External ROM, RAM, I/O
51
3
2.15 Summary
54
11
CHAPTER 3 Interfacing: Hardware and Software
65
48
3.1 Introduction
65
1
3.2 Mechanical Switches
66
6
3.3 Solid State Switches
72
6
3.4 Solenoids and Relays
78
5
3.5 Displays and Printers
83
5
3.6 Handshaking
88
1
3.7 Centronics Parallel Interface
89
2
3.8 IEEE-488 Bus (GPIB)
91
2
3.9 RS-232 (EIA-232) Serial Interface
93
4
3.10 Some Parallel I/O Applications
97
3
3.11 Some Interrupt-Driven Applications
100
4
3.12 Analog/Digital Interfacing
104
7
3.13 Summary
111
2
CHAPTER 4 The Basics of 8051 C Programming
113
30
4.1 Introduction
113
1
4.2 8051 Memory Constitution
114
3
4.3 Constants, Variables, and Data Types
117
1
4.4 Arrays, Structures, and Unions
118
3
4.5 Pointers
121
9
4.6 Loops and Decisions
130
3
4.7 Functions, Modules, and Programs
133
8
4.8 Summary
141
2
CHAPTER 5 8051 C Programming Examples
143
27
5.1 Introducing Proview
143
3
5.2 Data Interface
146
2
5.3 Timer Control
148
3
5.4 Interrupt Operations
151
1
5.5 Digital Operations
152
3
5.6 A/D and D/A Conversions
155
2
5.7 Example of Common Control Problems
157
11
5.8 Summary
168
2
CHAPTER 6 State Machines and Interrupt Timing
170
11
6.1 Introduction
170
1
6.2 Finite State Machines
171
5
6.3 Interrupt Constraints
176
3
6.4 Summary
179
2
CHAPTER 7 System Design Techniques
181
29
7.1 Introduction: The System Design Cycle
181
4
7.2 Top-Down vs. Bottom-Up Design
185
1
7.3 Systems Requirements for the Project
185
1
7.4 System Specifications for the Project
186
3
7.5 Hardware Design
189
2
7.6 Software Design
191
1
7.7 Software Modularization
192
2
7.8 Pseudo-Code
194
9
7.9 Assembly Language
203
2
7.10 System Integration and Evaluation
205
1
7.11 Summary
206
4
APPENDIX A Project Design
210
11
A.1 Hardware Description of the Project
210
1
A.2 The I/O Driver Subsystem
210
11
APPENDIX B Mes(R)-51 Programmer's Guide and Instruction Set
221
74
APPENDIX C ASCII and EBCDIC Tables
295
6
Index
301